A REVIEW STUDY ON THE USE OF HIGH-LEVEL SYNTHESIS FOR IMPLEMENTING DEEP LEARNING ALGORITHMS IN FPGAs

Abstract

Because of the high precision that they offer, CNNs represent a very important model for systems that do image identification. However, such a task has high costs. For this reason, the current goal is to implement designs that are fast, but at the same time not costly. GPUs are an alternative, but they do not offer the best solution due to their large power consumption. FPGAs on the other hand, suit more with CNNs systems because they consume less energy and have a flexible structure. The difficult part for FPGA architectures is implementing CNN systems using HDL, which is not a platform on which to program; it is simply hardware-level code to describe components of hardware like registers and counters. With HLS, designers are now capable of using high-level languages like C or C++ to implement CNNs into FPGAs, because HLS “translates” or synthesizes the codes written in high-level languages into hardware-level code or RTL parameters. This thesis represents a review on the previous work done on the CNNs implementation on FPGAs using HLS and summarize the results obtained.